1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor apparatus and, particularly, to a method of manufacturing a semiconductor apparatus for large-current or low-resistance use.
2. Description of Related Art
Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) that are used for power supply in consumer-electronics products such as cell phones, personal computers and digital audiovisual equipments or for driving of vehicle motors carry a high current of about 1 to 200 A. It thus requires a thick external wire with a large cross sectional area. Therefore, in order to draw a high current, a plurality of large-gauge bonding wires of about 100 to 500 μm have been connected as an external wire to a source electrode of a MOSFET.
However, the bonding wires are connected to the source electrode typically by ultrasonic bonding or thermocompression bonding, and it requires a bonding area of about 1.5 to 3 times the wire cross-sectional area. The area of the source electrode or the gate electrode, however, is limited to small and there is thus a limit to enlarge the wire cross-sectional area. Further, a larger wire cross-sectional area requires higher pressure application to obtain a larger bonding strength, and the mechanical impact causes damage to a semiconductor device. Furthermore, the looping of large-gauge bonding wires leads to a decrease in productivity.
To address these, a semiconductor apparatus and a manufacturing method of the same as described in Japanese Unexamined Patent Application Publication Nos. 2002-313851 (Oono et al.) and 2002-314018 (Funato et al.) use a flat-plate electric path member, instead of a bonding wire, as an external wire to thereby enlarge the cross-sectional area of the external wire. FIGS. 6A and 6B are a horizontal cross-sectional view and a vertical cross-sectional view, respectively, of a semiconductor device (Small Out-line Package (SOP)—8 packages) taught by Oono.
In the semiconductor apparatus 101 of FIGS. 6A and 6B, a semiconductor device 105 is included in a molding resin 102. On the semiconductor device 105, a source electrode 104s and a gate electrode 104g are formed on the top surface, and a drain electrode (not shown) is formed on the under surface.
Four drain-side terminals 103b out of eight leads are integrated into one set to form a drain-side post 107d inside the molding resin 102. The semiconductor device 105 is placed above the drain-side post 107d, such that the drain-side post 107d is electrically connected with the drain electrode (not shown). Out of the remaining four leads, three source-side terminals 103s are integrated into one set to form a source-side post 107s inside the molding resin 102, and one gate-side terminal 103g forms a gate-side post 107g inside the molding resin 102.
The source-side post 107s and the source electrode 104s are electrically connected by an electric path member 106. An electrode-side connecting portion 106a formed at one end of the electric path member 106 and the source electrode 104s, and a lead-side connecting portion 106b formed at the other end of the electric path member 106 and the source-side post 107s, respectively, are connected by ultrasonic bonding in direct contact with each other. The use of the flat-plate electric path member 106 allows the cross sectional area of the current path flowing between the source-side post 107s and the source electrode 104s to be significantly larger than that of the current path flowing through a plurality of bonding wires. The gate-side post 107g is electrically connected with the gate electrode 104g by one boding wire 108.
As a bonding technique that does not give mechanical damage to a semiconductor device, wire bonding using laser is known. FIG. 7 is a cross-sectional view showing a semiconductor apparatus according to Japanese Unexamined Patent Application Publication No. 61-53737 (FIG. 2) (Matsuda et al.). A semiconductor device 201 is placed on a die pad 203 of a lead frame. An electrode pad 202 placed on the semiconductor device 201 and a lead 204 of the lead frame are electrically connected by a bonding wire 205. The wire 205 and the electrode pad 202 are connected by laser welding.
However, the ultrasonic bonding process taught by Oono et al. and Funato et al. can cause mechanical damage to the semiconductor device due to ultrasonic vibration. Further, because it is a mechanical bonding process, the bonding can be difficult for some metals.
Specifically, a step of mounting a semiconductor device on a die pad (island) of a lead frame is carried out at the temperature of 300° C. or higher; as a result, an oxide film is formed on the surface of the electrode of the semiconductor device. In order to provide mechanical bonding between the external wire and the electrode at low temperature, it is necessary to break the oxide film on the electrode surface to exposure a new surface. As such, ultrasonic vibration is applied to the external wire and the electrode that are arranged in contact with each other. However, if the external wire has a large cross-sectional area, the mechanical impact to be applied to the electrode due to the vibration of the external wire becomes large, which can cause the mechanical damage to reach the semiconductor device under the electrode. Particularly, a MOSFET has an active cell immediately under the electrode and a product can be breakdown. Further, the bonding is difficult for Cu or the like with a thick surface oxide film.
On the other hand, the laser bonding process taught by Matsuda et al. can cause thermal damage to the semiconductor device under the electrode. As described above, large-gauge wires of about 100 to 500 μm or above are used to reduce the resistance in order for the MOSFET to carry a high current. This corresponds to the thickness of 100 to 500 μm. On the other hand, the thickness of the electrode is as small as about 2 to 6 μm as described in Oono et al. The adjustment of laser intensity is extremely difficult when laser-welding the members having significantly different thicknesses because high laser intensity leads to thermal damage to the semiconductor device by laser, and low laser intensity fails to establish connection or obtain desired connection intensity.